Home > News > Dongbu HiTek adopts Legend Design Technology's Memory Characterization Tools for Quality Timing and Power Models
May 7th, 2007
Dongbu HiTek adopts Legend Design Technology's Memory Characterization Tools for Quality Timing and Power Models
Abstract:
Using CharFlo-Memory! can prevent the reliability issues such as ‘glitch' and ‘meta-stability' due to incorrect setup and hold time modeling. Especially, the input of sense-amplifier in read cycle may be smaller than 'noise margin' (e.g. 100mv.), which will cause the false data outputs. This problem is normally due to the PVT variations and overdrive high frequency in low-power and high-speed designs. The CharFlo-Memory! can automatically validate the input of sense-amplifier against the noise margin to improve the design yields.
"Quality of embedded memory models is essential for the silicon success of deep-submicron and nanometer SoC designs," said Dr. You-Pang Wei, president and chief executive officer of Legend Design Technology. "With the adoption of Legend's Charflo-Memory!, Dongbu HiTek has acquired the premier solution for memory re-characterization and verification at any PVT. We're pleased to be working closely with Dongbu HiTek in meeting their needs for state-of-the-art SoC designs."
Source:
us.design-reuse.com
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