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August 22nd, 2004
Resist Road to the 22 nm Technology Node
Abstract:
There are many stumbling blocks on the road to the 22 nm technology node. The lithography-related specifications of the 2003 International Roadmap for Semiconductors (ITRS)[1] for this node calls for a DRAM half-pitch of 22 nm, printed gate length of 13 nm, resist thickness of 40-80 nm, line-edge (LER) roughness (3-sigma) of 1 nm, and critical dimension (CD) control (3-sigma) of 1 nm.
Source:
future-fab
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