Nanotechnology Now

Our NanoNews Digest Sponsors
Heifer International



Home > News > TSMC takes wraps off 65-nm plans

April 29th, 2003

TSMC takes wraps off 65-nm plans

Abstract:
Taiwan Semiconductor Manufacturing Co. Ltd. last week presented the first details of its 65-nanometer process technology for next-generation designs starting in late 2004. TSMC also became the latest chip maker to endorse strained-silicon technology for IC production at both the 90-nm and 65-nm nodes.

Source:
EETimes

Bookmark:
Delicious Digg Newsvine Google Yahoo Reddit Magnoliacom Furl Facebook

Related News Press

Chip Technology

Metasurfaces smooth light to boost magnetic sensing precision January 30th, 2026

Beyond silicon: Electronics at the scale of a single molecule January 30th, 2026

Researchers demonstrates substrate design principles for scalable superconducting quantum materials: NYU Tandon–Brookhaven National Laboratory study shows that crystalline hafnium oxide substrates offer guidelines for stabilizing the superconducting phase October 3rd, 2025

Lab to industry: InSe wafer-scale breakthrough for future electronics August 8th, 2025

NanoNews-Digest
The latest news from around the world, FREE




  Premium Products
NanoNews-Custom
Only the news you want to read!
 Learn More
NanoStrategies
Full-service, expert consulting
 Learn More











ASP
Nanotechnology Now Featured Books




NNN

The Hunger Project