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Home > News > 3D nanotube assembly technique for nanoscale electronics

October 22nd, 2008

3D nanotube assembly technique for nanoscale electronics

Abstract:
For the past several years, researchers have been trying to take advantage of carbon nanotubes' good electrical properties for future nanoscale electronics applications. One of the biggest challenges in this area is finding ways to arrange and assemble the nanotubes into 3D configurations for carrying current in nanoscale devices.

Most recently, a team of physicists and engineers from the Electronic Materials Research Institute at Northeastern University in Boston, Massachusetts, has demonstrated a technique for assembling nanotubes using an applied electric field. Using this method, the researchers could assemble single-walled carbon nanotubes into 3D structures by coaxing the nanotubes into deep nanoholes in a porous alumina template. An average of one nanotube per hole was vertically assembled, and, by sweeping the 0.32cm2 area, more than one million holes were filled with nanotubes.

Source:
physorg.com

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