Nanotechnology Now - Press Release: "SEMATECH Researchers Demonstrate High-k Metal Gates for 22 nm Node and Advancements Resulting in Practical FinFETs and High Mobility Ge Channels"

Home > Press > SEMATECH Researchers Demonstrate High-k Metal Gates for 22 nm Node and Advancements Resulting in Practical FinFETs and High Mobility Ge Channels

Abstract:
SEMATECH researchers are presenting trend-setting research results in extending CMOS logic and memory technologies at the International Symposium on VLSI Technology, System and Applications (VLSI-TSA) this week. The new materials, processes and concepts discussed in a series of seven research papers describe how current semiconductor technologies can benefit from performance-enhancing features for future scaling needs.

SEMATECH Researchers Demonstrate High-k Metal Gates for 22 nm Node and Advancements Resulting in Practical FinFETs and High Mobility Ge Channels

HSINCHU, Taiwan | Posted on April 21st, 2008

"Our goal is to harness advanced new materials and device structures for continued scaling of semiconductor technologies by augmenting performance," said Raj Jammy, SEMATECH director of Front End Processes. "These papers show innovative and practical pathways that can easily be incorporated in real-world manufacturing environments."

The papers were selected from hundreds of submissions, and are being presented by an international team of researchers. They discuss leading-edge research into areas such as high-k/metal gate (HKMG) materials, flash memory, planar and non-planar CMOS technologies including exciting new finFET designs, which offer additional control on the channel or body of the device by using a controlling gate wrapped around a thin silicon "fin".

* Gate First Band Edge High-k/Metal Stacks with EOT = 0.74 nm for 22 nm Node nFETs - demonstrates innovative materials engineering to develop high-k dielectrics and silicon band-edge nFET metal gates for future scaled nodes
* Achieving Low Vt < -0.3 V and Thin EOT 1.0 nm in Gate First Metal/High-k pMOSFET for High-Performance CMOS Applications - describes the use of new aluminum oxide derivative HKMG material to achieve low threshold voltage pFET devices with an aggressive EOT suitable for 32 nm generation devices
* Enhanced Performance and SRAM Stability in FinFET and Reduced Process Steps for Source/Drain Doping - explores an implementation of an innovative finFET design that optimizes performance for next-generation 22 nm and beyond technologies
* Controlled Threshold Voltage of High-Mobility Germanium (Ge) pMOSFETs with High-k/metal Gate on Epitaxial Ge Films on Si Substrates - explores the use of ultra-thin high mobility germanium (Ge) channels directly but selectively on silicon. Ge, the original semiconductor material may now improve performance in silicon-based technology

* Tunnel Oxide Dipole Engineering in TANOS Flash Memory for Fast Programming with Good Retention and Endurance - explores new designs in flash memory with dramatically improved performance by making use of dipole engineering to improve key performance metrics
* Understanding Strain Effects on Double-Gate FinFET Drive-Current Enhancement, Hot Carrier Reliability and Ring-Oscillator Delay Performance via Uniaxial Wafer Bending Experiments - explores FinFET performance characteristics and reliability under the effects of controlled stress, which is a common approach to boost performance in CMOS devices
* Physical Characteristics of HfO2 Dielectrics at the Physical Scaling Limit - explores characterization of highly scaled hafnium oxide (HfO2) films on advanced systems to obtain better understanding of the fundamental physical nature of the material at the atomic level. Such learning is directly applicable to improve the performance of future generations of HKMG devices.

These papers represent SEMATECH's research on second generation HKMG systems and follow the consortium's 2007 announcement of practical first generation HKMG systems, the result of 10 years' painstaking investigation and innovation. HKMG implementation by leading-edge manufacturers is helping them to transcend the limitations of increasingly condensed surface areas, showing significant performance and power consumption advantages over traditional approaches.

The International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) is sponsored by the Institute of Electrical and Electronics Engineers, or IEEE, a leading professional association for the advancement of technology in association with Taiwan's Industrial Technology Research Institute (ITRI). VLSI-TSA runs from April 21-23 and provides a platform for technical exchanges by experts from around the world. It is one of many industry forums SEMATECH uses to collaborate with scientists and engineers from corporations, universities and other research institutions, many of whom are research partners.

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About SEMATECH
SEMATECH is an international consortium of semiconductor manufacturers and suppliers that improves members’ return on investment by driving fundamental innovations in technology, emerging platforms and approaches. In over 20 years of producing industry-changing breakthrough technology, SEMATECH has led the push into successive waves of next-generation innovations, from high-k materials to nanotechnology, that move discovery into practical application.

For 20 years, SEMATECH® (www.sematech.org), the global consortium of leading semiconductor manufacturers, has set global direction, enabled flexible collaboration, and bridged strategic R&D to manufacturing. Today, we continue accelerating the next technology revolution with our nanoelectronics and emerging technology partners.

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Contacts:
SEMATECH
Anne Englander
512-356-7155

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