Abstract:
SUSS MicroTec introduces nano PREP, a novel method of surface activation and wafer to wafer bonding that enables the creation of semiconductor materials such as silicon on insulator (SOI) and strained silicon using direct wafer bonding (DWB). SUSS' new patent pending technology reduces the process temperature from 1000C down to 200C allowing new applications for wafer level integration of CMOS and MEMS or CMOS and nanotechnology. SUSS' unique nano PREP technology incorporates an atmospheric pressure plasma to generate a molecular level surface modification which allows low temperature bonding.