- About Us
- Nano-Social Network
- Nano Consulting
- My Account
December 13th, 2007
The university-research consortium Semiconductor Research Corp (SRC) of Research Triangle Park, NC, USA is funding Scotland's University of Glasgow in a $2.5m, three-year project ( from 1 January) to identify the best p-channel material to scale minimum MOSFET feature sizes in CMOS devices (including gate length) down to the 8nm technology generation.
By exploiting compound semiconductor materials for the p-type channel, the Glasgow research is expected to enable the shrinking of silicon chips for a further 4-6 years beyond previous projections for the miniaturization roadmap .
|Related News Press|
Forge Nano 2017: 1st Quarter Media Update April 20th, 2017
SUNY Polytechnic Institute Announces Total of 172 Teams Selected to Compete in Solar in Your Community Challenge: Teams from 40 states, plus Washington, DC, 2 Territories, and 4 American Indian Reservations, Will Deploy Solar in Underserved Communities April 20th, 2017
Leti Announces EU/South Korean Project for World’s First 5G-system Prototype: Coinciding with the 2018 Winter Games in PyeongChang, Korea, Prototype Will Be First Time State-of-the-art Terrestrial Wireless Communication Is Seamlessly Combined with Disruptive Satellite Communicati April 4th, 2017
ATTOPSEMI Technology Joins FDXcelerator Program to Deliver Advanced Non-Volatile Memory IP to GLOBALFOUNDRIES 22 FDX® Technology Platform: Leading-edge I-fuse™ brings higher reliability, smaller cell size and ease of programmability for consumer, automotive, and IoT applications March 27th, 2017
Better living through pressure: Functional nanomaterials made easy April 19th, 2017
Shedding light on the absorption of light by titanium dioxide April 14th, 2017