- About Us
- Nano-Social Network
- Nano Consulting
- My Account
May 7th, 2007
Using CharFlo-Memory! can prevent the reliability issues such as ‘glitch' and ‘meta-stability' due to incorrect setup and hold time modeling. Especially, the input of sense-amplifier in read cycle may be smaller than 'noise margin' (e.g. 100mv.), which will cause the false data outputs. This problem is normally due to the PVT variations and overdrive high frequency in low-power and high-speed designs. The CharFlo-Memory! can automatically validate the input of sense-amplifier against the noise margin to improve the design yields.
"Quality of embedded memory models is essential for the silicon success of deep-submicron and nanometer SoC designs," said Dr. You-Pang Wei, president and chief executive officer of Legend Design Technology. "With the adoption of Legend's Charflo-Memory!, Dongbu HiTek has acquired the premier solution for memory re-characterization and verification at any PVT. We're pleased to be working closely with Dongbu HiTek in meeting their needs for state-of-the-art SoC designs."
|Related News Press|
NUS researchers achieve major breakthrough in flexible electronics: New classes of printable electrically conducting polymer materials make better electrodes for plastic electronics and advanced semiconductor devices January 14th, 2017
Characterization of magnetic nanovortices simplified December 21st, 2016
New technology of ultrahigh density optical storage researched at Kazan University: The ever-growing demand for storage devices stimulates scientists to find new ways of improving the performance of existing technologies November 30th, 2016