Nanotechnology Now

Our NanoNews Digest Sponsors





Heifer International

Wikipedia Affiliate Button


DHgate

Home > Press > Imec Teams With Cadence to Present Automated Design-for-Test (DFT) Solution for 3D Memory-on-Logic

Imec’s 3D wrapper extension for Wide-I/O DRAM
Imec’s 3D wrapper extension for Wide-I/O DRAM

Abstract:
At the European 3D TSV Summit in Grenoble, France on January 22-23, 2013, imec, a world-leading nano-electronics research institute, today announced that together with Cadence Design Systems they have developed, implemented and validated an automated 3D Design-for-Test (DFT) solution to test logic-memory interconnects in DRAM-on-logic stacks. The solution, based on Cadence® Encounter® Test technology, was verified on an industrial test chip containing a logic die and a JEDEC-compliant Wide-I/O Mobile DRAM.

Imec Teams With Cadence to Present Automated Design-for-Test (DFT) Solution for 3D Memory-on-Logic

Leuven, Belgium | Posted on January 22nd, 2013

Memory-on-logic 3D stacks offer the possibility of heterogeneous integration with dense low-power inter-die interconnects. Hence, they are amongst the first 3D products that will come on the market, enabling next-generation high-performance low-power mobile applications. Recently, JEDEC has released a standard (JESD-229) for stackable Wide-I/O mobile dynamic random access memories (DRAMs) specifying the logic-memory interface. Unlike many previous DRAMs, the standard contains boundary scan features to facilitate interconnect testing. Imec and Cadence now present a design-for-test (DFT) architecture and corresponding automatic test pattern generation (ATPG) approach. It is an extension of their previously announced logic-on-logic 3D DFT architecture and it supports post-bond testing of the interconnects between the logic die and the DRAM stacked on top of it.

The solution implemented by Cadence and imec includes the generation of DRAM test control signals in the logic die and the inclusion of the DRAM boundary scan registers in the serial and parallel test access mechanisms (TAMs) of the 3D test architecture. The automated design for test solution has been validated on an industrial test chip. The design of the test chip is an interposer-based 3D stacked IC which includes a silicon interposer base die, a 94mm2 logic system-on-chip in 40nm technology, and a single Wide-I/O DRAM rank. The validation results show that the silicon area of the additional DFT wrapper is negligible compared to the total logic die size (<0.03%). Moreover, the test pattern generation was very efficient (tens of patterns, generated in only a few seconds) and effective (100% coverage of the targeted faults). All 3D-DFT logic in the logic die was automatically inserted with Cadence Encounter RTL Compiler while the Interconnect test patterns were generated with Encounter Test ATPG.

"This 3D memory-on-logic DFT solution is another big step forward toward market introduction of 3D-stacked IC for next-generation high-performance, low-power mobile applications," said Bassilios Petrakis, product marketing director for the Encounter Test product family at Cadence. "Our collaboration with imec has enabled the creation of an industry-leading solution that enhances efficiencies of 3D-IC design for our customers."

"Teaming up with Cadence enables us to automate the insertion of our DFT circuitry in a given design, and to automate the interconnect test pattern generation. Such automated flows make our technology valuable for the industry. We are confident that we can also handle the DFT features that start to emerge in other 3D memory standards," said Erik Jan Marinissen, Principal Scientist at imec.

Part of the work has been performed in the project ESiP, which is co-funded by the ENIAC Joint Undertaking.

####

About IMEC
Imec performs world-leading research in nano-electronics. Imec leverages its scientific knowledge with the innovative power of its global partnerships in ICT, healthcare and energy. Imec delivers industry-relevant technology solutions. In a unique high-tech environment, its international top talent is committed to providing the building blocks for a better life in a sustainable society. Imec is headquartered in Leuven, Belgium, and has offices in Belgium, the Netherlands, Taiwan, US, China, India and Japan. Its staff of close to 2,000 people includes more than 600 industrial residents and guest researchers. In 2011, imec's revenue (P&L) was about 300 million euro. Further information on imec can be found at www.imec.be.

Imec is a registered trademark for the activities of IMEC International (a legal entity set up under Belgian law as a "stichting van openbaar nut”), imec Belgium (IMEC vzw supported by the Flemish Government), imec the Netherlands (Stichting IMEC Nederland, part of Holst Centre which is supported by the Dutch Government), imec Taiwan (IMEC Taiwan Co.) and imec China (IMEC Microelectronics (Shangai) Co. Ltd.) and imec India (Imec India Private Limited).

For more information, please click here

Contacts:
Hanne Degans
External Communications Officer
T: +32 16 28 17 69
Mobile: +32 486 065 175


Olga Walsh | Business Technology
[ f o r m u l a ]
Formula PR, Inc.
1215 Cushman Avenue
San Diego, CA 92110
Office 619-234-0345 |

Copyright © IMEC

If you have a comment, please Contact us.

Issuers of news releases, not 7th Wave, Inc. or Nanotechnology Now, are solely responsible for the accuracy of the content.

Bookmark:
Delicious Digg Newsvine Google Yahoo Reddit Magnoliacom Furl Facebook

Related News Press

News and information

Laboratorial Performance of Nanocomposite Membrane Improved in Water Purification July 28th, 2015

Perfect Optical Properties in Production of Aluminum Oxide Colloid Nanoparticles July 28th, 2015

Short wavelength plasmons observed in nanotubes: Berkeley Lab researchers create Ludinger liquid plasmons in metallic SWNTs July 28th, 2015

'Seeing' molecular interactions could give boost to organic electronics July 28th, 2015

Chip Technology

Nanometrics Announces Upcoming Investor Events July 28th, 2015

Short wavelength plasmons observed in nanotubes: Berkeley Lab researchers create Ludinger liquid plasmons in metallic SWNTs July 28th, 2015

Quantum networks: Back and forth are not equal distances! July 28th, 2015

Superfast fluorescence sets new speed record: Plasmonic device has speed and efficiency to serve optical computers July 27th, 2015

Memory Technology

Reshaping the solar spectrum to turn light to electricity: UC Riverside researchers find a way to use the infrared region of the sun's spectrum to make solar cells more efficient July 27th, 2015

Spintronics: Molecules stabilizing magnetism: Organic molecules fixing the magnetic orientation of a cobalt surface/ building block for a compact and low-cost storage technology/ publication in Nature Materials July 25th, 2015

Better memory with faster lasers July 14th, 2015

The quantum middle man July 2nd, 2015

Announcements

Laboratorial Performance of Nanocomposite Membrane Improved in Water Purification July 28th, 2015

Perfect Optical Properties in Production of Aluminum Oxide Colloid Nanoparticles July 28th, 2015

Short wavelength plasmons observed in nanotubes: Berkeley Lab researchers create Ludinger liquid plasmons in metallic SWNTs July 28th, 2015

'Seeing' molecular interactions could give boost to organic electronics July 28th, 2015

Events/Classes

Photonex 2015 - The 3rd biennial Optical Metrology meeting is announced with an exciting number of speakers from across Europe July 28th, 2015

Nanometrics Announces Upcoming Investor Events July 28th, 2015

Nanophase to present paper on slurry pH impact at Optics + Photonics conference July 28th, 2015

Albany College of Pharmacy and Health Sciences to Host One Week Symposium on Nanomedicine July 23rd, 2015

Alliances/Trade associations/Partnerships/Distributorships

Liquipel Debuts Eyesight-Saving ION-Glass Blue Light Protection for iPhones and Androids at RadioShack Stores Nationwide: Liquipel's Unique Protective Screen, Available at RadioShack, Cuts Harmful Blue Light Implicated in Macular Degeneration by 10x July 28th, 2015

Dais Analytic's Business Affiliate in China Announces Ten-Year Strategic Energy Efficiency Business Arrangement With COFCO: Dais Beijing to Perform Feasibility Study on Over 80 Buildings to Improve Efficiencies as Part of Overall Hotel Energy-Savings Project July 23rd, 2015

Leti and Diabeloop Project Aims at Developing Artificial Pancreas for Diabetes Treatment July 22nd, 2015

Imec and Panasonic Demonstrate Breakthrough RRAM Cell July 16th, 2015

NanoNews-Digest
The latest news from around the world, FREE



  Premium Products
NanoNews-Custom
Only the news you want to read!
 Learn More
NanoTech-Transfer
University Technology Transfer & Patents
 Learn More
NanoStrategies
Full-service, expert consulting
 Learn More











ASP
Nanotechnology Now Featured Books




NNN

The Hunger Project