Nanotechnology Now

Our NanoNews Digest Sponsors
Heifer International



Home > Press > SEMATECH Technologists Demonstrate Breakthrough Process Solutions for Extending Advanced Memory and Logic Technologies: Novel solutions for high mobility channel CMOS devices, FinFETs, RRAMs and technologies beyond CMOS devices

Abstract:
SEMATECH experts reported on innovative approaches to realize advanced CMOS logic and memory device technologies and 3D through-silicon via (TSV) manufacturing at the International VLSI Technology, System and Applications Symposium (VLSI-TSA) on April 23-25, 2012.

SEMATECH Technologists Demonstrate Breakthrough Process Solutions for Extending Advanced Memory and Logic Technologies: Novel solutions for high mobility channel CMOS devices, FinFETs, RRAMs and technologies beyond CMOS devices

Hsinchu, Taiwan | Posted on April 25th, 2012

Today nearly all electronic devices are built on complementary metal-oxide semiconductor (CMOS) technology. For over half a century, silicon-based materials have been the basic layers used in the manufacturing of CMOS transistors; however, these staple materials as well as materials derived from silicon such as insulators and contact metals are reaching their limits, as the industry looks to lower power dissipation in CMOS devices and as scaling approaches the physical limits of silicon transistors.

In a series of nine research papers, an international team of SEMATECH researchers reported on innovative materials and new transistor structures to address key aspects of transistor performance, power, and cost. The papers, selected from hundreds of submissions, outlined leading-edge research in high-k/metal gate (HKMG) materials, resistive RAM (RRAM) memory, and planar and non-planar CMOS technologies.

"Through intense research and development efforts, SEMATECH is developing manufacturable solutions and practical implementation approaches for innovative materials in future transistor structures," said Raj Jammy, vice president of emerging technologies. "The research that was presented at VLSI TSA demonstrates SEMATECH's leadership in developing new materials, processes and concepts that will pave the way for emerging technologies."

One potentially industry-changing technology, a direct metal bonding interconnect approach, was introduced by Sitaram Arkalgud, director of SEMATECH's 3D interconnect program. In order for 2.5D and 3D integration to reach its full potential, chip-to-interposer and chip-to-chip interfaces have to support a very large number of power and signal connections. Today, most solder-based interconnect schemes will not scale sufficiently due to mechanical, electrical, thermal, and reliability limitations.

Arkalgud revealed SEMATECH's copper-to-copper direct bonding (CuDB) technology as a promising technology to aggressively scale chip-to-chip interconnects and keep pace with advances in TSV. He also discussed recent progress and remaining technical and economic hurdles in moving toward high-volume manufacturing of CuDB interconnects.

SEMATECH technologists also reported technical advances in the following areas:

Silicon Channel Devices

· Evaluating stress-induced leakage current (SILC) in full gate-last (FGL) high-k/metal gate devices to address sources of SILC and propose possible process options for improvement. A high quality interlayer during gate stack formation was found to be critical to improving FGL device performance and reliability.

· Modeling positive bias temperature instability (PBTI) degradation in Zr-doped HfO2 gate stacks by considering fast and slow electron trapping processes. PBTI was found to improve when the fast trapping component was suppressed.

Non-Silicon Channel Devices

· Using different ALD oxidizers to study the effects of III-V oxides on device performance. With a O3 precursor, As-As, AsOx, GaO, and In2O3 were found to be the main native oxides/byproducts. H2O-based precursors remain stable with no III-V oxide detected throughout a low temperature flow. Electrical performance also improved with H2O-based high-k, suggesting that H2O-based ALD is the key process for III-V CMOS.

· Exploring alternative high-k gate dielectrics for III-V, Ge and Si MOSFETs. High-field carrier mobility and MOSFET parameter characteristics were improved by atomic layer deposition (ALD) of a thin beryllium oxide layer to passivate the interface between the Si channel and high-k gate dielectric.

Non-Planar Devices

· Studying FinFET Vt tuning. Both performance and the electrical properties of the gate stack were improved by an Al implantation, representing progress towards realizing multi threshold voltage FinFET device architectures for the 14 nm node and beyond.

· Studying the impact of fin doping on high-k/midgap metal gate SOI FinFETs. Threshold voltage can be effectively modulated with doping in ~25 nm wide fins. For sub-10 nm fin widths, however, the active dopant atoms must be precisely placed inside the fins, which ion implantation cannot do. A conformal doping technique with perfect dose control, such as monolayer doping, was discussed which may be the solution for future planar and non-planar devices.

· Evaluating the parasitic capacitance of planar FETs and double-gated (DG) FinFETs. Optimization with a fixed fin-to-height ratio significantly reduces parasitic capacitance, which renders DG FinFETs comparable to planar FETs. Fin width and height must be controlled in the DG FinFETs, otherwise the parasitic capacitance uniformity will degrade.

· Investigating the impact of source/drain (S/D) activation anneal on GAA pFETs. Low temperature pFETs were fabricated and benchmarked against devices with a S/D activation anneal. When S/D is implanted before the gate spacer, the un-annealed devices exhibited higher peak transconductance and drain current but have a higher off-current than their annealed counterparts. Pre- and post-spacer S/D implant schemes were also explored.

Advanced Non-Volatile Memory

· RRAM switching performance up to 1x108 cycles at low power and a 100x reduction of the high-resistance-state current was achieved by identification and utilization of key parameters for establishing superior control of the RRAM conductive filament formation.

SEMATECH's front end processes program, located at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, is exploring innovative materials, new transistor structures, and alternative non-volatile memories to address key aspects of system-level performance, power, variability, and cost and to help accelerate innovation in the continued scaling of logic and memory applications.

The International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) is sponsored by Taiwan's Industrial Technology Research Institute (ITRI) in association with Institute of Electrical and Electronics Engineers, or IEEE, a leading professional association for the advancement of technology. VLSI-TSA is one of many industry forums SEMATECH uses to collaborate with scientists and engineers from corporations, universities and other research institutions, many of whom are research partners.

####

About SEMATECH
SEMATECH®, the international consortium of leading semiconductor device, equipment, and materials manufacturers, this year celebrates 25 years of excellence in accelerating the commercialization of technology innovations into manufacturing solutions. Through our unwavering commitment to foster collaboration across the nanoelectronics industry, we help our members and partners address critical industry transitions, drive technical consensus, pull research into the industry mainstream, improve manufacturing productivity, and reduce risk and time to market. Information about SEMATECH can be found at www.sematech.org.

Twitter: www.twitter.com/sematechnews

For more information, please click here

Contacts:
Erica McGill
SEMATECH
Media Relations
257 Fuller Road, Suite 2200
Albany, NY 12203
o: 518-649-1041
m: 518-487-8256

Copyright © SEMATECH

If you have a comment, please Contact us.

Issuers of news releases, not 7th Wave, Inc. or Nanotechnology Now, are solely responsible for the accuracy of the content.

Bookmark:
Delicious Digg Newsvine Google Yahoo Reddit Magnoliacom Furl Facebook

Related News Press

News and information

Researchers develop artificial building blocks of life March 8th, 2024

How surface roughness influences the adhesion of soft materials: Research team discovers universal mechanism that leads to adhesion hysteresis in soft materials March 8th, 2024

Two-dimensional bimetallic selenium-containing metal-organic frameworks and their calcinated derivatives as electrocatalysts for overall water splitting March 8th, 2024

Curcumin nanoemulsion is tested for treatment of intestinal inflammation: A formulation developed by Brazilian researchers proved effective in tests involving mice March 8th, 2024

Chip Technology

New chip opens door to AI computing at light speed February 16th, 2024

HKUST researchers develop new integration technique for efficient coupling of III-V and silicon February 16th, 2024

Electrons screen against conductivity-killer in organic semiconductors: The discovery is the first step towards creating effective organic semiconductors, which use significantly less water and energy, and produce far less waste than their inorganic counterparts February 16th, 2024

NRL discovers two-dimensional waveguides February 16th, 2024

Memory Technology

Interdisciplinary: Rice team tackles the future of semiconductors Multiferroics could be the key to ultralow-energy computing October 6th, 2023

Researchers discover materials exhibiting huge magnetoresistance June 9th, 2023

Rensselaer researcher uses artificial intelligence to discover new materials for advanced computing Trevor Rhone uses AI to identify two-dimensional van der Waals magnets May 12th, 2023

TUS researchers propose a simple, inexpensive approach to fabricating carbon nanotube wiring on plastic films: The proposed method produces wiring suitable for developing all-carbon devices, including flexible sensors and energy conversion and storage devices March 3rd, 2023

Announcements

What heat can tell us about battery chemistry: using the Peltier effect to study lithium-ion cells March 8th, 2024

Curcumin nanoemulsion is tested for treatment of intestinal inflammation: A formulation developed by Brazilian researchers proved effective in tests involving mice March 8th, 2024

The Access to Advanced Health Institute receives up to $12.7 million to develop novel nanoalum adjuvant formulation for better protection against tuberculosis and pandemic influenza March 8th, 2024

Nanoscale CL thermometry with lanthanide-doped heavy-metal oxide in TEM March 8th, 2024

Events/Classes

Researchers demonstrate co-propagation of quantum and classical signals: Study shows that quantum encryption can be implemented in existing fiber networks January 20th, 2023

CEA & Partners Present ‘Powerful Step Towards Industrialization’ Of Linear Si Quantum Dot Arrays Using FDSOI Material at VLSI Symposium: Invited paper reports 3-step characterization chain and resulting methodologies and metrics that accelerate learning, provide data on device pe June 17th, 2022

June Conference in Grenoble, France, to Explore Pathways to 6G Applications, Including ‘Internet of Senses’, Sustainability, Extended Reality & Digital Twin of Physical World: Organized by CEA-Leti, the Joint EuCNC and 6G Summit Sees Telecom Sector as an ‘Enabler for a Sustainabl June 1st, 2022

How a physicist aims to reduce the noise in quantum computing: NAU assistant professor Ryan Behunin received an NSF CAREER grant to study how to reduce the noise produced in the process of quantum computing, which will make it better and more practical April 1st, 2022

Alliances/Trade associations/Partnerships/Distributorships

Manchester graphene spin-out signs $1billion game-changing deal to help tackle global sustainability challenges: Landmark deal for the commercialisation of graphene April 14th, 2023

Chicago Quantum Exchange welcomes six new partners highlighting quantum technology solutions, from Chicago and beyond September 23rd, 2022

CEA & Partners Present ‘Powerful Step Towards Industrialization’ Of Linear Si Quantum Dot Arrays Using FDSOI Material at VLSI Symposium: Invited paper reports 3-step characterization chain and resulting methodologies and metrics that accelerate learning, provide data on device pe June 17th, 2022

University of Illinois Chicago joins Brookhaven Lab's Quantum Center June 10th, 2022

Research partnerships

Researchers’ approach may protect quantum computers from attacks March 8th, 2024

How surface roughness influences the adhesion of soft materials: Research team discovers universal mechanism that leads to adhesion hysteresis in soft materials March 8th, 2024

'Sudden death' of quantum fluctuations defies current theories of superconductivity: Study challenges the conventional wisdom of superconducting quantum transitions January 12th, 2024

Development of zinc oxide nanopagoda array photoelectrode: photoelectrochemical water-splitting hydrogen production January 12th, 2024

NanoNews-Digest
The latest news from around the world, FREE




  Premium Products
NanoNews-Custom
Only the news you want to read!
 Learn More
NanoStrategies
Full-service, expert consulting
 Learn More











ASP
Nanotechnology Now Featured Books




NNN

The Hunger Project