Nanotechnology Now

Our NanoNews Digest Sponsors
Heifer International

Wikipedia Affiliate Button

Home > Press > SEMATECH to showcase innovations in high-k metal gate reliability, non-planar devices and resistive rams at IEDM 2011: Technical papers demonstrate emerging solutions for critical material and device gaps in next generation device technologies

Abstract:
Engineers from SEMATECH are scheduled to present four technical papers and participate in a panel discussion at the 57th annual IEEE International Electron Devices Meeting (IEDM), December 5-7, 2011, at the Hilton in Washington, DC.

SEMATECH to showcase innovations in high-k metal gate reliability, non-planar devices and resistive rams at IEDM 2011: Technical papers demonstrate emerging solutions for critical material and device gaps in next generation device technologies

Albany, NY | Posted on October 13th, 2011

Highlighting significant breakthroughs that address the growing need for higher performance and low power devices, SEMATECH experts will report on high mobility channel materials, improved high-k metal gate reliability advancements, advanced non-planar device doping approaches, and resistive RAM (RRAM) memory technologies for scaled CMOS and memory beyond the 15nm node.
SEMATECH Presentations:

Title: Comprehensive Physical Modeling of Forming and Switching Operations in HfO2 RRAM Devices
When: Tuesday, December 6, 4 p.m.
Where: Jefferson Room

This paper will examine a novel physical model of RRAM devices that describes the creation of conductive filaments during forming and electrical transport in high and low resistance states.


Title: Improved High-k/Metal Gate Lifetime via Improved SILC Understanding and Mitigation
When: Tuesday, December 6, 3:10 p.m.
Where: Lincoln Room

This paper will identify, for the first time, key factors impacting stress-induced leakage current (SILC) through a comprehensive reliability study of high-k/ metal gate nMOSFETs, including several process changes that promise to mitigate SILC. An approach to reducing SILC, thereby improving device lifetime, will be proposed.


Title: ALD Beryllium Oxide: Novel Barrier Layer for High Performance Gate Stacks on Si and High Mobility Substrates
When: Wednesday, December 7, 9:30 a.m.
Where: Columbia 5 and 7

This paper will analyze BeO films epitaxially grown on Si and GaAs substrates using a conventional atomic layer deposition (ALD) technique. Their superior physical and electrical properties demonstrate the feasibility of employing this novel oxide as a gate dielectric and barrier layer in a manufacturing environment.


Title: 300mm FinFET Results Utilizing Conformal, Damage Free, Ultra Shallow Junction (Xj~5nm) Formed with Molecular Monolayer Doping Technique
When: Wednesday, December 7, 3:15 p.m.
Where: Columbia 5 and 7

This paper will demonstrate a new, conformal, damage-free doping technique (monolayer doping) for 20nm FinFETs. This technique is a promising candidate to address key FinFET scaling issues such as series resistance and short channel control for the 15nm node and beyond.

Panel Session:

Title: Is 3 Dimensional Integration at Best a Niche Play?
When: Tuesday, December 6, 8:00 p.m.
Location: International Ballroom Center

Sitaram Arkalgud, director of SEMATECH's Interconnect division, will join other distinguished industry experts, including Shekhar Borkar of Intel, SiYoung Choi of Samsung, John Lau of ITRI, and Jan Vardaman of Techsearch, Inc. The panel, moderated by IBM Fellow Subramanian Iyer, will explore critical 3D interconnect issues from each panelist's perspective and open the discussion to audience participation.


The IEDM conference draws an international audience of industry professionals for an intensive exploration of design, manufacturing, physics, and modeling of semiconductors and other electronic devices. The conference spotlights leading work from the world's top electronics scientists and engineers; it is one of many industry forums SEMATECH uses to collaborate with scientists and engineers from corporations, universities, and other research institutions, many of whom are research partners.

####

About SEMATECH
For over 20 years, SEMATECH® (www.sematech.org), the international consortium of leading semiconductor manufacturers, has set global direction, enabled flexible collaboration, and bridged strategic R&D to manufacturing. Today, we continue accelerating the next technology revolution with our nanoelectronics and emerging technology partners.

For more information, please click here

Contacts:
Erica McGill
SEMATECH
Media Relations
257 Fuller Road, Suite 2200
Albany, NY 12203
o: 518-649-1041
m: 518-487-8256

www.twitter.com/sematechnews

Copyright © SEMATECH

If you have a comment, please Contact us.

Issuers of news releases, not 7th Wave, Inc. or Nanotechnology Now, are solely responsible for the accuracy of the content.

Bookmark:
Delicious Digg Newsvine Google Yahoo Reddit Magnoliacom Furl Facebook

Related News Press

News and information

Machine learning speeds modeling of experiments aimed at capturing fusion energy on Earth May 17th, 2019

Manipulating atoms one at a time with an electron beam: New method could be useful for building quantum sensors and computers May 17th, 2019

New surface treatment could improve refrigeration efficiency: A slippery surface for liquids with very low surface tension promotes droplet formation, facilitating heat transfer May 17th, 2019

Generating high-quality single photons for quantum computing: New dual-cavity design emits more single photons that can carry quantum information at room temperature May 17th, 2019

Chip Technology

Generating high-quality single photons for quantum computing: New dual-cavity design emits more single photons that can carry quantum information at room temperature May 17th, 2019

Skoltech researchers developed new perovskite-inspired semiconductors for electronic devices May 13th, 2019

2D insulators with ferromagnetism are rare; researchers just identified a new one May 10th, 2019

Computing faster with quasi-particles May 10th, 2019

Announcements

Machine learning speeds modeling of experiments aimed at capturing fusion energy on Earth May 17th, 2019

Manipulating atoms one at a time with an electron beam: New method could be useful for building quantum sensors and computers May 17th, 2019

New surface treatment could improve refrigeration efficiency: A slippery surface for liquids with very low surface tension promotes droplet formation, facilitating heat transfer May 17th, 2019

Generating high-quality single photons for quantum computing: New dual-cavity design emits more single photons that can carry quantum information at room temperature May 17th, 2019

Events/Classes

CEA-Leti Develops CMOS Process for High-Performance MicroLEDs That Could Overcome Display-Size Obstacles: New Concept Creates All-in-One RGB MicroLEDs, Eliminates Several Transfer Steps to Receiving Substrate & Boosts Performance May 16th, 2019

Arrowhead Pharmaceuticals to Present at Upcoming May 2019 Conferences May 3rd, 2019

Nanometrics Announces Participation in Upcoming Investor Conferences May 3rd, 2019

180 Degree Capital Corp. to Report First Quarter 2019 Financial Results on Wednesday, May 1, 2019 and to Host a Conference Call on Thursday, May 2, 2019 April 26th, 2019

Alliances/Trade associations/Partnerships/Distributorships

Nanoscribe is Technology Partner of the Research Project MiLiQuant: 3D microfabrication meets quantum technology - Miniaturized light sources for industrial use in the fields of quantum sensor technology and quantum imaging April 1st, 2019

CEA-Leti Announces Prototype of Next-generation Photo-Acoustic Sensors for Gas Detection: REDFINCH Team Achieves These Capabilities in Mid-infrared Region, Where Many Important Chemical and Biological Species Have Strong Absorption Fingerprints March 21st, 2019

Synopsys and GLOBALFOUNDRIES Collaborate to Develop Industry’s First Automotive Grade 1 IP for 22FDX Process: Synopsys’ Portfolio of DesignWare Foundation, Analog, and Interface IP Accelerate ISO 26262 Qualification for ADAS, Powertrain, 5G, and Radar Automotive SoCs February 22nd, 2019

CEA-Leti & Stanford Target Edge-AI Apps with Breakthrough Memory Cell: Paper at ISSCC 2019 Presents Proof-of-Concept Multi-Bit Chip That Overcomes NVM’s Read/Write, Latency and Integration Challenges February 20th, 2019

NanoNews-Digest
The latest news from around the world, FREE



  Premium Products
NanoNews-Custom
Only the news you want to read!
 Learn More
NanoStrategies
Full-service, expert consulting
 Learn More











ASP
Nanotechnology Now Featured Books




NNN

The Hunger Project