Home > Press > The University of Tokyo Picks Docea Power to Design NVM Architecture as Part of Japanese National Research Program
New ReRam architecture promises power consumption at one tenth of the current level
The University of Tokyo Picks Docea Power to Design NVM Architecture as Part of Japanese National Research Program
Tokyo, Japan and Grenoble, France | Posted on January 19th, 2011
Docea Power, the design-for-low-power company that delivers software for power and thermal analysis at the architectural level (ESL), announced today that its Aceplorer software has been selected by the University of Tokyo to model and optimize power consumption for new non-volatile memory (NVM) designs and architectures as part of a Japanese national research project.
The project assesses the effectiveness of a new NVM design architecture developed by the team of Ken Takeuchi Associate Professor Electrical Engineering, at the University of Tokyo's Takeuchi Laboratory. The new memory called ReRAM for Resistance-change memory consumes significantly less power during data writing and shows less bit rate failure.
"Our new NVM architecture shows significant advances in terms of speed, power consumption and reliability," said Pr Ken Takeuchi. "By using Docea's Aceplorer to model power consumption at the electronic system level (ESL), we can investigate the optimum architecture design and share the power consumption performances with system architects."
Ghislain Kaiser, CEO of Docea Power added, "At Docea, we are committed to proposing solutions to the IC design community where new challenges of both power consumption and thermal distribution can only be solved at the ESL level in order to allow fast enough what-if analysis and architecture optimization."
Docea Power will exhibit at EDSFair 2011(Electronic Design and Solution Fair) Booth No. 218, Pacifico Yokohama, Japan, January 27-28, 2011
About Docea Power
Docea Power develops and commercializes a new generation of methodology and tools for enabling faster and more reliable power and thermal modelling at the electronic systems level. Its Aceplorer framework offers a consistent approach for executing architectural exploration and optimizing power and thermal behaviour of electronic systems at an early stage of a project.
Docea’s customers include manufacturers of electronic systems, chips and boards targeting wireless, multimedia, consumer, networking and automotive applications.
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