Nanotechnology Now

Our NanoNews Digest Sponsors

Heifer International

Wikipedia Affiliate Button

Home > Press > Imec reports breakthrough for next-generation vertical Flash memories

Figure Vertical Flash transistor: Program/erase characteristics on a vertical charge trap Flash cell with poly-Si substrate and corresponding cross-section
Figure Vertical Flash transistor: Program/erase characteristics on a vertical charge trap Flash cell with poly-Si substrate and corresponding cross-section

Abstract:
Imec realized a vertical Flash transistor with Si plug diameters down to 20nm. The associated vertical Flash platform paves the way to scale Flash memory to the next nodes. The vertical device concept features enhanced performance at lower voltages as well as reduced cost.

Imec reports breakthrough for next-generation vertical Flash memories

Belgium | Posted on June 22nd, 2010

Floating gate Flash memory has been scaling at a tremendous pace in recent years to arrive at a startling density of 32 gigabit (4 gigabyte) on a single die today, using 30nm technology and below. Drastic device concept changes are however required for future generations to cope with the scaling limits of today's floating gate technology. For example the electrostatic cell-to-cell interference and the low storage electron count are becoming major obstacles for further downscaling in the 20 and 10nm range.

Stacking cells in a vertical way on a chip, hence increasing the density per unit area by e.g. 8-16 for the same technology node, is a very promising approach to further push the cost down. Besides cost reduction, vertical stacking also improves the gate control and the field enhancement in the tunnel oxide because of the curvature of the gate-all-around structure. This leads to enhanced window and drive current even in the case of a poly-Si SONOS (silicon oxide nitride oxide silicon) device.

Imec designed a new process flow and all necessary test structures to optimize the vertical transistor flow. The process flow provides a gate layer and inter-gate isolation layers, which are etched all the way down to the Si (to form the so-called ‘plug'). Next, the ONO (oxide nitride oxide) memory gate stack is deposited on the sidewalls and the plug is filled with poly-Si which serves as the transistor substrate.
Plug opening, bottom junction as well as top junction profile and plug fill were found to be critical steps. Cylindrical cell structures have been obtained with Si diameters down to 20nm. A new process has been developed to allow the removal of the ONO stack at the bottom of the plug for source junction formation without damaging the tunnel oxide on the sidewalls.

Imec's vertical Flash transistor platform will be used to investigate the scalability of this concept for the generations corresponding to the planar 1x nodes. Further experiments will include the reduction of the cell diameter, the selection of the best ONO stack taking topography into account as well as alternative channel processing schemes.

These results were obtained in collaboration with imec's key partners in sub-22nm core CMOS research.

####

About imec
Imec is Europe’s largest independent research center in nanoelectronics and nano-technology. Its staff of more than 1,750 people includes over 550 industrial residents and guest researchers. Imec’s research is applied in better healthcare, smart electronics, sustainable energy, and safer transport.

For more information, please click here

Contacts:
Kapeldreef 75
B-3001 Leuven
Belgium

Phone: +32 16 28 12 11
Fax: +32 16 22 94 00

Copyright © imec

If you have a comment, please Contact us.

Issuers of news releases, not 7th Wave, Inc. or Nanotechnology Now, are solely responsible for the accuracy of the content.

Bookmark:
Delicious Digg Newsvine Google Yahoo Reddit Magnoliacom Furl Facebook

Related News Press

News and information

Ultracold atom waves may shed light on rogue ocean killers: Rice quantum experiments probe underlying physics of rogue ocean waves April 27th, 2017

Looking for the quantum frontier: Beyond classical computing without fault-tolerance? April 27th, 2017

Metal nanoparticles induced visible-light photocatalysis: Mechanisms, applications, ways of promoting catalytic activity and outlook April 27th, 2017

Arrowhead Pharmaceuticals to Webcast Fiscal 2017 Second Quarter Results April 27th, 2017

Display technology/LEDs/SS Lighting/OLEDs

New ultrafast flexible and transparent memory devices could herald new era of electronics April 1st, 2017

UC researchers use gold coating to control luminescence of nanowires: University of Cincinnati physicists manipulate nanowire semiconductors in pursuit of making electronics smaller, faster and cheaper March 17th, 2017

Perovskite edges can be tuned for optoelectronic performance: Layered 2D material improves efficiency for solar cells and LEDs March 10th, 2017

Research opens door to smaller, cheaper, more agile communications tech February 16th, 2017

Chip Technology

Geoffrey Beach: Drawn to explore magnetism: Materials researcher is working on the magnetic memory of the future April 25th, 2017

'Neuron-reading' nanowires could accelerate development of drugs for neurological diseases April 12th, 2017

Nanometrics to Announce First Quarter Financial Results on May 2, 2017 April 11th, 2017

AIM Photonics Presents Cutting-Edge Integrated Photonics Technology Developments to Packed House at OFC 2017, the Optical Networking and Communication Conference & Exhibition April 11th, 2017

Memory Technology

Geoffrey Beach: Drawn to explore magnetism: Materials researcher is working on the magnetic memory of the future April 25th, 2017

New ultrafast flexible and transparent memory devices could herald new era of electronics April 1st, 2017

Information storage with a nanoscale twist: Discovery of a novel rotational force inside magnetic vortices makes it easier to design ultrahigh capacity disk drives March 28th, 2017

Smart multi-layered magnetic material acts as an electric switch: New study reveals characteristic of islands of magnetic metals between vacuum gaps, displaying tunnelling electric current March 1st, 2017

Nanoelectronics

Researchers “iron out” graphene’s wrinkles: New technique produces highly conductive graphene wafers April 3rd, 2017

A big leap toward tinier lines: Self-assembly technique could lead to long-awaited, simple method for making smaller microchip patterns March 27th, 2017

Scientists discover new 'boat' form of promising semiconductor: GeSe Uncommon form attenuates semiconductor's band gap size March 23rd, 2017

UC researchers use gold coating to control luminescence of nanowires: University of Cincinnati physicists manipulate nanowire semiconductors in pursuit of making electronics smaller, faster and cheaper March 17th, 2017

Announcements

Ultracold atom waves may shed light on rogue ocean killers: Rice quantum experiments probe underlying physics of rogue ocean waves April 27th, 2017

Looking for the quantum frontier: Beyond classical computing without fault-tolerance? April 27th, 2017

Metal nanoparticles induced visible-light photocatalysis: Mechanisms, applications, ways of promoting catalytic activity and outlook April 27th, 2017

Arrowhead Pharmaceuticals to Webcast Fiscal 2017 Second Quarter Results April 27th, 2017

NanoNews-Digest
The latest news from around the world, FREE



  Premium Products
NanoNews-Custom
Only the news you want to read!
 Learn More
NanoTech-Transfer
University Technology Transfer & Patents
 Learn More
NanoStrategies
Full-service, expert consulting
 Learn More











ASP
Nanotechnology Now Featured Books




NNN

The Hunger Project