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Junctionless transistor outperforms nanowire MOSFETThe Netherlands | Posted on April 21st, 2010
Several years ago, imec theoreticians developed the concept of the pinch-off nanowire FET. Originally, the idea was to avoid surface interactions such as surface roughness scattering or high-k surface phonon scattering wich degrade the charge carrier mobility, by moving the charge carriers away from the interface between the substrate and the insulator. The solution to this problem was to consider a nanowire where source, drain and channel are uniformly doped. For a n-type nanowire pinch-off FET, the charge carriers responsible for the current are delivered by the ionized donors. As the gate voltage is increased, the channel of the wire is depleted and, eventually, pinch-off will occur.
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