Home > News > Nanometer ICs have stringent testing requirements
October 25th, 2006
Nanometer ICs have stringent testing requirements
Abstract:
As the EDA industry focuses on design-for-manufacturability (DFM), the older problem of design-for-test has almost been forgotten. But ICs built at 90 nanometers and below pose new and troubling challenges for DFT tools and techniques, according to providers who will take part in this week's International Test Conference here.
Source:
EETimes
Bookmark:
Nanoelectronics
Imec and Renesas collaborate on ultra-low power short range radios: Collaboration will develop robust wireless solutions for future electronics May 16th, 2013
Piezoelectric 'taxel' arrays convert motion to electronic signals for tactile imaging April 25th, 2013
Battery and Memory Device in One April 25th, 2013
Secret of the Crystal's Corners: New Nanowire Structure Has Potential to Increase Semiconductor Applications: University of Cincinnati research describes discovery of a new structure that is a fundamental game changer in the physics of semiconductor nanowires April 23rd, 2013
Announcements
JPK reports on single molecule research at IISER Pune in India using AFM and CellHesion techniques May 21st, 2013
Imec and GLOBALFOUNDRIES collaborate to advance high-density memory technology: STT-MRAM offers enhanced performance and scalability for embedded and standalone applications May 21st, 2013
International survey supports need for built-in water protection on smartphones and tablets May 21st, 2013
Rice unveils method for tailoring optical processors: Arranging nanoparticles in geometric patterns allows for control of light with light May 21st, 2013