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Home > News > Nano memory scheme handles defects

September 8th, 2004

Nano memory scheme handles defects

Abstract:
Electrical components that are two or three orders of magnitude smaller than E. coli bacteria promise ultra-high speed at ultra-low-power, but they also present several challenges. Nanoscale electronics devices have a fairly high defect rate, and architectures designed to guide their use must take this into account

Researchers from Hongik University in Korea have devised a memory architecture designed for nanoscale crossbar electronics.

Source:
TRN

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